The present invention relates to a NAND-type semiconductor storage device and a method for manufacturing the same.
There have conventionally been developed NAND-type flash memories as nonvolatile semiconductor memories. A memory cell transistor of a NAND-type flash memory has a structure in which a floating gate electrode formed above a semiconductor substrate via a tunnel insulating film and a control gate electrode formed above the floating gate electrode via an interelectrode insulating film are stacked.
A NAND-type flash memory is formed by series-connecting pairs of source and drain regions of a plurality of memory cell transistors between two selection transistors and connecting one of the selection transistors to a bit line and the other to a source line. A control gate electrode of each memory cell transistor serves as a part of a word line.
An element isolation insulating film (i.e., an element isolation region) is formed between memory cell transistors which are adjacent to each other in the direction of a corresponding word line, and the memory cell transistors adjacent in the direction of the word line are isolated from each other by the element isolation insulating film. An interlayer insulating film is formed between a piece of wiring such as the bit line and the semiconductor substrate.
In this case, the NAND-type flash memory has various problems such as variations in gate threshold voltage caused by a parasitic capacitance which occurs between the piece of wiring and the semiconductor substrate and a parasitic capacitance which occurs between the memory cell transistors adjacent in the direction of the word line.
To prevent such problems, there is proposed formation of a NAND-type flash memory on an SOI substrate (see, e.g., Japanese Patent Laid-Open No. 2000-174241 and Japanese Patent Laid-Open No. 11-163303).
However, since this method uses an SOI substrate as a substrate, it is higher in substrate cost than a case where an ordinary silicon substrate is used.
The following are the names of documents pertaining to a NAND-type flash memory formed on an SOI:
Japanese Patent Laid-Open No. 2000-174241 and
Japanese Patent Laid-Open No. 11-163303.